Accelerating Sparse Deep Neural Networks

Introduction

In the area of Deep Learning, using larger neural network models typically leads to higher accuracy for various tasks . Modern state-of-the-art models can consist of hundreds of billions of parameters and require trillions of compute operations per input sample. Pruning of neural network parameters has emerged as an important technique to reduce model sizes and compute requirements at inference time.

Pruning accomplishes this by pushing certain parameter values to zero, inducing sparsity in a model . However, existing pruning methods can struggle to simultaneously maintain model accuracy and gain inference performance (speed). Fine-grained sparsity maintains accuracy but poorly utilizes memory accesses and fails to take advantage of modern vector and matrix math pipelines, thus it does not outperform traditional dense models on processor architectures such as GPUs. Coarse-grained sparsity can better utilize processor resources but fails to maintain accuracy beyond moderate sparsity ratios.

In this paper, we describe a 2:4 (read as “two-to-four”) sparsity pattern that halves a model’s parameter count, requiring that every group of consecutive four values contains at least two zeros. We also describe a workflow to prune traditional, dense models for this pattern while maintaining their accuracy. This workflow prunes weights of a densely-trained model once, then repeats the training session with a fixed sparsity pattern using the same hyper-parameters as in the original training session. Furthermore, we describe Sparse Tensor Cores, introduced in the NVIDIA Ampere GPU architecture , to accelerate operations on 2:4 sparse matrices. Sparse Tensor Cores double math throughput for matrix-multiply operations when the first argument is a compressed 2:4 sparse matrix. Matrix multiplication is a compute primitive behind math-intensive neural network operations such as convolutions, linear layers, recurrent cells, and transformer blocks.

The contributions of this paper include: (1) a fine-grained 2:4 structured pruning approach, (2) a compression format to efficiently store such pruned tensors in memory, (3) hardware architecture to accelerate sparse matrix multiplication involving a 2:4 sparse tensor, and (4) an empirically-verified workflow that re-trains pruned weights to eliminate accuracy loss in many standard networks. We summarize prior sparsity research in Section 2. The 2:4 pattern, compressed storage format required by Sparse Tensor Cores, and Sparse Tensor Core operation are detailed in Section 3. Section 4 describes the methodology for training neural networks to have 2:4 weight sparsity so that inference can be accelerated. In Section 5, we provide an empirical study on a variety of popular tasks and neural network architectures highlighting the universality of our proposed workflow in maintaining model accuracy while not having to change any hyper-parameters. Section 6 concludes the paper with a summary and directions for future work.

Related Work

Neural network model pruning approaches can be grouped into the following categories:

train and prune a dense model, then fine-tune the remaining weights in the model to recover accuracy,

train a dense model with gradual pruning to obtain a sparse model,

train a sparse model with a sparsity pattern selected a priori, or

train a sparse model with a sparsity pattern determined based on trained dense version.

Fine-tuning methods prune fully-trained dense weights and continue to fine-tune the remaining weights for additional training samples. Different approaches in this space can be distinguished by the pruning method, pruning schedule, sparsity structure, and fine-tuning schedule used during the fine-tuning phase. Pruning methods typically eliminate weights using weight magnitude based metrics or some salience-based criteria ). A variety of pruning schedules have been proposed – single step and gradual/iterative . Iterative methods prune weights gradually over a number of steps, in each step eliminating either a fixed number of weights or choosing a fraction of weights based on an analytical function . Furthermore, the pattern used to prune models may adhere to a specific structure or follow no structure at all . Structured pruning removes parameters in groups (entire filters, channels, etc.) in order to exploit hardware and software optimized for dense computation. However, at higher levels of sparsity these pruning methods lose model accuracy . For example, ResNet-50 can see a 2$\times$ speedup through channel pruning, but close to 1.5% accuracy is lost . Unstructured pruning eliminates individual parameters without any regard to the resulting pattern. Networks pruned with unstructured sparsity tend to retain more accuracy than similarly sized networks pruned with structured sparsity, but they rarely fully utilize the underlying hardware capabilities. For example, model parameters can be pruned by nearly 13$\times$ with no loss in accuracy, but the pruning pattern is not conducive to hardware acceleration . Hence, the performance benefit with such unstructured pruning approaches is negligible and at times negative, even when pruning rate is high (e.g. 95%) . The difficulty of getting inference speed benefits with unstructured patterns is even more pronounced on processor architectures with matrix pipelines, such as GPUs and TPUs (Tensor Cores and systolic arrays, respectively). No universal fine-tuning schedule has been proposed yet – schedules often vary from model to model (for example,using 10 epochs of fine-tuning for one network but requiring 20 epochs for another network model).

Some approaches train models with a fixed sparsity pattern starting from the random initialization of the network, but the pattern is computed based on a fully trained or partially trained dense model of the same architecture. These approaches maintain accuracy and achieve 80%-99% sparsity. While run-time is not discussed in these works, given the use of unstructured sparsity, it is unlikely for these pruned models to efficiently utilize modern matrix processors.

Sparse models can also be obtained by starting from randomly-initialized dense models and gradually introducing sparsity as training progresses . Typically, 70%-99% unstructured sparsity is targeted to prepare models for inference. As described above, these models struggle to outperform dense models due to their unstructured sparsity. Furthermore, to maintain accuracy, model and training hyper-parameters are often modified, and these modifications can be quite model-specific. For example, in , the hidden size of a recurrent network was increased by 1.75$\times$ while pruning to 95% sparsity. In another case , the training schedule was extended for some networks by 5$\times$ in order to reach the same accuracy as the dense model.

Finally, there have been proposals to design sparse model architectures, aimed at efficient hardware utilization during training and inference. Most prominent example of this category is block sparsity, where sparsity is introduced at a block level allowing good utilization of matrix math pipelines . However, similar to approaches discussed above, in order to maintain accuracy, one has to increase the hidden size compared to the dense model. Block sparsity has found use for cases where using a larger hidden size enables higher accuracy but is impractical with dense models. Additionally, there has been work investigating fine-grained structured sparsity and motivating the need to prune in a fine-grained pattern that is conducive to hardware acceleration . Key points are optimized GPU kernels to speed up such pruned models on CUDA cores and the benefits of custom hardware to speed up structurally pruned models .

While a variety of approaches for pruning neural networks to high degrees of sparsity have been proposed, no one method has been described to maintain accuracy while achieving inference speedup. Fine-tuning workflows provide inconclusive results on which pruning schemes to use (e.g. magnitude or heuristic based weight pruning, prune partially trained or fully trained weights), what pruning method to follow (e.g. one-shot or iterative pruning, layer by layer pruning or whole network pruning.) and what fine-tuning schedule to use (e.g. how many epochs of fine-tuning, what learning rate to use, etc.). In short, extracting performance from hardware by pruning networks while maintaining accuracy and using a fine-tuning workflow that is consistent across a variety of networks is still an open problem. This motivated our search for a sparsity pattern that enables hardware acceleration as well as maintains accuracy with a workflow applicable over a wide range of neural network tasks and models.

Sparsity Support in the NVIDIA Ampere Architecture

We introduce 2:4 sparsity to address the challenges of adopting sparsity outlined in the last section. The 2:4 pattern mandates that for each group of 4 values, at least 2 must be zero. This leads to 50% sparsity, which makes maintaining accuracy without hyper-parameter exploration much more practical than, say, 80% sparsity. When applied to a matrix, the 2:4 pattern has the following benefits over alternative sparsity approaches:

2x math throughput increase on the NVIDIA Ampere GPU architecture

The pattern and compressed format are detailed in Section 3.1, while Sparse Tensor Cores that take advantage of this format are described in Section 3.2.

An example of a matrix that satisfies 2:4 sparsity pattern requirement is shown in Figure 1. With this pattern, only the 2 nonzero values in each group of 4 values need to be stored. Metadata to decode compressed format is stored separately, using 2-bits to encode the position of each nonzero value within the group of 4 values. For example, metadata for the first row of matrix in Figure 1 is $[,]$. Metadata information is needed to fetch corresponding values from the second matrix when performing matrix multiplication. Note that for a group of 4 values having more than 2 zeros, the compressed format will still store 2 values to maintain a consistent format.

Unstructured sparsity patterns lead to poor utilization of cache lines when accessing memory, thus under utilizing memory bandwidth. Furthermore, unstructured patterns commonly use CSR/CSC/COO storage formats , which lead to data-dependent accesses, thereby increasing latency for matrix reads. In contrast, 2:4 sparsity has the same level of sparsity at every sub-block of the larger matrix, which enables hardware to fully-utilize large memory reads. Similarly, since the sparsity is constant across the matrix, there is no indirection required; a nonzero value’s position in memory can be determined from the compression rate directly.

1.2 Compressed format efficiency:

Using CSR format for unstructured sparsity can introduce storage overhead due to metadata of up to 200% (consider 8b quantized weight values for inference: column-index for the value would require 16-bits or more for even modestly-sized matrices). Due to its 4-value block size, the 2:4 sparse storage format (shown in Figure 1) requires only 2-bits metadata per value, limiting storage overhead to 12.5% and 25% for 16b and 8b values, respectively. For 16-bit operands, storing a sparse tensor in compressed format leads to $\sim$44% savings in storage capacity: 4 dense elements require 4$\ast$16 = 64-bits of storage while 2:4 sparsity leads to 2$\ast$16-bits + 2$\ast$2-bits = 36-bits to store the two non-zero elements. For 8-bit operands, storing in compressed format saves $\sim$38% in memory capacity and bandwidth compared to the dense tensor.

2 Structured-Sparse GEMM on Tensor Cores

Tensor Cores, first introduced in the NVIDIA Volta GPU architecture, accelerate matrix-multiply-and-accumulate (MMA) instructions that are fundamental to neural network layers involving math operations such as convolutions, linear layers, recurrent cells, and transformer blocks.

The NVIDIA Ampere GPU architecture extends the Tensor Cores to also handle 2:4 sparsity by allowing the first argument be stored in the sparse format described in Section 3.1. Thus, Sparse Tensor Cores perform sparse matrix $\times$ dense matrix = dense matrix operation (the second input matrix and the output matrix are dense). Figure 2 shows how a 2:4 sparse GEMM operation is mapped to Tensor Cores. 50% sparsity on one of the operands halves the required multiply-and-add operations, resulting in (up to) a 2$\times$ performance increase over equivalent dense GEMMs. Sparse Tensor Cores support FP16, BF16, and 8b-integer input/output types. Furthermore, TF32 mode is supported for FP32 input/output but the pattern becomes 1:2 sparse. Peak dense and sparse Tensor Core throughputs are shown in Table 1.

It is the application’s responsibility to ensure that the first operand is a matrix stored in the compressed 2:4 format. cuSPARSELt and other libraries provide APIs for compression and sparse math operations, while, starting in version 8.0, the TensorRT SDK performs these functions for 2:4 sparse weights automatically. NVIDIA libraries require that input dimensions of a sparse matrix multiplication be multiples of 16 and 32 for 16-bit (FP16/BF16) and 8b-integer formats, respectively.

Speedups that 2:4 sparse matrix multiplications achieve over dense multiplications depend on several factors, such as arithmetic intensity and GEMM dimensions. Figure 3 shows speedups achieved over a sampling of GEMM dimensions (cuSPARSELthttps://docs.nvidia.com/cuda/cusparselt/index.html cuBLAShttps://docs.nvidia.com/cuda/cublas/index.html libraries were used for the sparse and dense GEMMs, respectively). As larger GEMMs tend to have higher arithmetic intensity, they get closer to the $2\times$ speedup afforded by Sparse Tensor Cores. For language modeling networks, N is often the sequence length times the batch size: for a sequence length of 256, one would need a batch size of 40 to see this plot with N equal to 10K. M and K are related to the hidden dimensions of the layers in the network, which is typically scaled up to increase network accuracy; GPT-3 , for example, uses a hidden size of 12,288.

Network Pruning Workflow

In this section, we describe a workflow that prunes a network with the 2:4 sparsity pattern, maintains original accuracy, and avoids any hyper-parameter searches. Since our aim is to reduce neural network size and run-time at deployment, we trade a higher training cost for a simple and general workflow – the additional training cost can be amortized over the deployment lifetime of days to months.

While our proposed workflow trains a network twice, it achieves universality - as we will show, it can be applied across a wide range of neural network architectures and tasks. It follows the basic train, prune, and fine-tune approach:

initialize the weights to the values from Step 2,

use the same optimizer and schedule (learning-rate, schedule, number of epochs, etc.) as in Step 1,

maintain the sparsity pattern computed in Step 2.

This workflow is implemented in the Automatic SParsity (ASP) library for PyTorch and is illustrated in Figure 4, where the two training stages are identical in learning rate schedule and length and are separated by the one-shot pruning step. While Step 1 is straightforward, some details about Steps 2 and 3 follow.

At its simplest, the pruning step removes the two smallest weights in each group of four to meet the 2:4 pattern requirement, as illustrated in Figure 5. We found using the magnitude criteria sufficient, but one could consider other metrics, such as output activation similarity or instantaneous gradients.

At this point in the workflow, the opportunity exists to change the layout of the network’s weights using channel permutations to minimize the impact of the pruning step. Figure 6 shows how this works on a random dense matrix (top-left). When this matrix is pruned with the 2:4 sparse constraint (top-right), some relatively large values are lost, resulting in a final total weight magnitude of 83.7. By first permuting columns of this weight matrix to distribute the large values more evenly (lower-left), they are preserved after pruning (lower-right), for a final total weight magnitude of 102.9.

Since permutations are applied to columns of weights (the $A$ matrix in Figure 2), the rows of activations ($B$) must be similarly permuted to maintain the same result for the GEMM operation. We accomplish this by permuting the rows of the weights used to produce those activations, typically the weights of the previous layer. For convolutions, permutations are applied to the input channel dimension, which becomes a component of the weight matrix’s column dimension. This process does not change the computations performed or the network’s results and incurs no runtime overhead.

For the majority of networks tested, these permutations are not required - step 2 is as simple as enforcing the 2:4 constraint on the weight tensors as they are. However, some networks are designed with efficiency in mind and begin with very few parameters; simply pruning and fine-tuning these models may still result in accuracy loss. Channel permutations make the most of each nonzero parameter and allow 2:4 sparsity to maintain accuracy for these parameter-efficient networks, as shown in Table 3. Details about finding quality permutations will be presented separately.

1.2 Step 3: Sparse retraining:

We use retraining to recover model accuracy lost when half of the weights are removed by Step 2 of the workflow. To avoid any hyper-parameter search, we simply repeat the training session from Step 1, starting with weights from Step 1 rather than a random initialization. It is important to reset all hyper-parameters and optimizer state, such as momenta, etc. Any weight removed in Step 2 should retain its zero value in order to maintain the 2:4 sparsity pattern.

2 Layers to Prune

In our studies, we prune only layers that have learnable parameters and lead to a GEMM-like operation during the neural network’s execution on hardware. Such layers include convolution, fully-connected, and recurrent layers. We do not prune layers with inner dimensions (GEMM-K for fully-connected or recurrent layers and C$\times$R$\times$S for convolution layers) that are not multiples of 16 and 32 for 16-bit floating point and 8b-integer formats, respectively. We also do not prune embedding layers (typical in language processing tasks) since these layers effectively implement a lookup table. Further, since our goal is to speed up inference, we do not prune layers that are involved only in the training phase and not in the inference phase of the network. Such layers include language-modeling heads used during training in language processing networks (like BERT ) which are then replaced by task-specific heads during inference, auxiliary classifiers used in Inception networks which are removed altogether for deployment, and the entirety of discriminator networks used in adversarial training of generative networks (GANs).

3 Applying the Workflow to Models Trained in Multiple Phases

For models that are trained in a single phase, the application of the workflow from Section 4.1 is straightforward. Examples of single-phase training include image classification networks trained on the ILSVRC2012 dataset, language translation networks trained on a single dataset, etc. However, when networks are trained in multiple phases, we can consider how many and which phases to consider for Steps 1 and 3 of the workflow. For example, object detection networks are often trained in 2 phases: first the backbone is trained on ILSVRC2012, then the detector heads are added and the model is trained for detection on COCO dataset. Another example is question answering networks, such as BERT, that are first trained for language modeling and then trained for question answering on another dataset. We break such scenarios down into two categories:

In some cases where the second phase trains on a small data set, we have observed that the pruned network does not go through enough updates to recover accuracy after pruning if only the second phase is used for the retraining step of the workflow. An example of this case is a language model like BERT, which is pre-trained on a very large dataset and then fine-tuned on a much smaller dataset for downstream tasks. The solution to this problem is to simply prune and retrain after the pre-training step, as shown in Figure 7. Then, the fine-tuning for the downstream task starts with a sparse and retrained model and simply maintains the sparsity pattern.

3.2 Cases that can prune and retrain only the second phase:

In contrast to language models, common object detection tasks fine-tune with a large-enough data set to not require repeating the backbone’s pre-training. In this case, it is sufficient to train a dense backbone and fine-tune detection or segmentation heads. At this point, after all the weights have been trained, they can be pruned and the fine-tuning repeated, as shown in Figure 8. It is important to note that the task-specific heads have to be fine-tuned before they can be pruned.

These examples show different types of two-phase training; the same principles can be applied to training sessions consisting of more than two phases.

4 Combining Sparsity and Quantization

Quantization is a popular technique to accelerate neural network inference – by adapting the network to use narrower integer types, for example INT8, we can both reduce memory bandwidth pressure and benefit from higher throughput math pipelines . Quantizing a network typically starts with a network trained in floating point, then calibration is applied to determine the parameters for replacing floating point values and math with low-bit integer ones. While some networks retain accuracy immediately after quantization, others require fine-tuning to recover lost accuracy. For both types of networks our recommendation is to apply quantization calibration (and potentially fine-tuning) after a network has been pruned (and retrained) for sparsity.

Results

We evaluate the workflow proposed in Section 4 across a range of problem domains, tasks, and neural network architectures. For training each of the networks, we use hyper-parameters and training details mentioned in the papers introducing the network architecture and/or popular public repositories of network implementations. We examine model accuracy for both floating point networks as well as their quantization to INT8.

Image classification networks are trained in a single phase, thus retraining simply repeats the training step schedule (with the exact same hyper-parameters and learning rate schedule as used to train the network) starting with the network initialized to its pruned trained weights.

Table 2 shows the accuracy of a wide variety of networks: popular networks like ResNet , VGG and Inception , stacked U-Nets (SUNet) , dilated residual networks (DRN) . We also examine networks trained with weakly (WSL) or semi-weakly supervised learning (SWSL) methods which use additional data to improve accuracy. We prune all the convolution and fully-connected layers except for the first one ($7\times 7$ convolution on 3-channel input) since they do not have a GEMM-K dimension that is an even multiple of 16.

Weight and input activation tensors in convolution layers, including the first layer, and fully-connected layers are quantized to INT8. Entropy and max calibration are used for activations and weights, respectively. Per-tensor scaling factors are used for activation tensors, per-channel scaling factors are used for weight tensors in convolutions, and per-row scaling factors are used for weight tensors in fully-connected layers.

The results in Table 2 indicate the accuracy is maintained for both floating point and quantized networks when sparsity workflow from Section 4 is applied. While for some networks, sparse and quantized models accuracy is slightly different than for the dense non-quantized counterparts, these differences are within bounds of run-to-run variation caused by random seeds or fine-tuning non-determinism.

Some of the lower-parameter networks (MobileNet v2 , SqueezeNet , MNASNet , ShuffleNet v2 , and EfficientNet ) do not fully recover accuracy when applying the basic workflow. As Table 3 shows, permuting the weights before pruning allows a fully recovery of accuracy for these models.

2 Image Segmentation and Detection Networks

To study object detection and segmentation, we use networks from PyTorch Torchvision, Detectron2 , NVIDIA Deep Learning Examples for Tensor Cores , and NVIDIA ADLR repositories.

Image segmentation and object detection models are typically trained in two phases: first a backbone is trained for image classification, followed by the addition of model components (segmentation/detection heads, FPN, etc.), and then training for detection or segmentation. Backbones are trained on the ILSVRC2012 dataset, downstream tasks are trained on COCO 2017 , with some semantic segmentation networks also using Mapillary and Cityscapes datasets.

Since these detection and segmentation datasets are relatively large, we find that we can prune the weights after the second phase and repeat the training of only the second phase. Accuracy results are summarized in Table 4, which shows sparse results matching those of the dense counterparts.

For each network, all layers in the backbone (except the very first 3-channel convolution) and heads are pruned with 2:4 sparsity, and all layers (including the first convolution) are quantized to INT8. Similar to classification networks, entropy calibration with per-tensor scaling factors are used for activation tensors, and max calibration with per-channel or per-row scaling factors are used for weight tensors.

3 Generative Adversarial Networks (GANs)

As part of devising a scheme for stabilizing the fine-tuning of sparse GANs , we apply the procedure from Section 4 to generate 2:4 sparse floating-point networks to a variety of GANs and tasks. The results for Frechet Inception Distance (FID) scores (lower is better) from this work are shown in Table 5.

4 Networks for Natural Language Processing (NLP)

To study the behavior of our workflow on NLP tasks, we select recurrent-based translation network (GNMT ), Transformer-based translation network (FairSeq Transformer ), and two language modeling networks (Transformer-XL and BERT ).

Language translation networks are trained in a single-phase, thus the training session is repeated using the original hyper-parameters after pruning. After fine-tuning, the networks are quantized to INT8 using max calibration . Per-tensor scaling factors are used for activation tensors and per-row scaling factors are used for weight tensors in fully-connected and recurrent layers. Table 6 shows the accuracy of networks retrained for the 2:4 pattern matching that of the dense originals.

4.2 Language Modeling:

The Enwik8 dataset is used for Transformer-XL evaluation, and SQuAD v1.1 is used for BERT evaluation. State-of-art language modeling networks involve a two-stage training process: unsupervised training (also called pre-training) on large-scale unlabeled data sets, followed by fine-tuning on much smaller data sets for downstream tasks, such as question-answering and entailment classification. For these networks, our studies show that repeating pre-training step after pruning and then fine-tuning the sparse network on target task leads to a model that matches dense network’s accuracy (shown in Table 7). We use the BERTLARGE model and training scripts as described in NVIDIA Megatron repository . For both networks, all GEMM layers involving weight/parameter tensors inside a transformer block/layer are pruned (attention layers are not pruned since they do not involve any weights).

When quantizing BERT to INT8, all GEMM layers including batched-GEMM layers operate on INT8 operands, along with data in the residual connections. This aggressive quantization can cause a small accuracy degradation, but sparsity matches the dense accuracy in both cases. Per-tensors scaling factors are used with max calibration for weight tensors and percentile calibration for activations tensors in fully-connected layers. The pruned pre-trained language model is fine-tuned for both quantization operations as well as the SQuAD dataset’s task-specific heads at the same time.

Conclusions and Future Work

Sparsity in neural networks remains an active research area. Unstructured sparsity, which is the subject of many research efforts, requires very high levels of sparsity in order to achieve speedups over dense math on modern processors with matrix-math pipelines. However, very sparse networks have difficulty maintaining model accuracy. To overcome these challenges, we introduced 2:4 structured sparsity, hardware primitives for its acceleration, and a workflow for pruning networks. The NVIDIA Ampere GPU architecture introduces Sparse Tensor Cores, which have 2$\times$ math throughput for GEMM-like operations (convolutions and matrix multiplies) where the first argument is a tensor with 2:4 sparsity. The workflow was empirically shown to maintain accuracy over a wide range of tasks and neural network models, trained using standard learning rate schedules found in public code repositories.

The proposed sparsity workflow repeats a training session after pruning the weights of a trained dense networks. The benefit of this approach is that retraining does not require any hyper-parameter changes or searches. However, since this workflow doubles the training time, an interesting direction for future investigations is finding shorter fine-tuning schedules. Some preliminary experiments with a grid-search have identified a set of hyper-parameters (initial learning rate, learning rate schedule and epochs/iterations to fine-tune) for shorter fine-tuning sessions that maintained accuracy. However, these parameters were highly network- and task-dependent, and we have not yet been able to identify hyper-parameters that work universally for various tasks and networks. Thus, a universal approach to reduced fine-tuning requirements remains future work. Another interesting direction for future work is exploring the effects of sparsity on models that were trained to the limits of their capacity - there are indications that some popular models can achieve higher accuracy when trained on larger datasets or with longer training schedules. While we looked at some models trained on larger datasets (with weakly and semi-weakly supervised techniques) in Section 5, evaluating alternative training schedules is an interesting next step.

Our proposed workflow targets acceleration of inference. While this matches what would be needed to accelerate the forward pass of training, in order to also accelerate the backward pass of training, the 2:4 constraint must also be satisfied by the transposed weight tensors. This can be done by enforcing the constraint along both dimensions of the weight matrix: rows and columns. The PyTorch ASP library provides a simple greedy approach, as well as an exhaustive search, that seeks to minimize the weight magnitude lost by pruning; investigation of more efficient mask-finding algorithms is an active research area (for example, ) and is left as future work. To accelerate training, one would also aim to minimize the number of updates performed with a dense network. For this, one may need to train with dynamic sparsity masks, evolving them during training (as opposed to static masks computed once during pruning, which this paper shows to suffice for inference). Thus, investigation of dynamic mask requirements is an intriguing area for future work as well.

Finally, it is also interesting to investigate pruning of activations, as some layers, such as multi-head attention in Transformer-based networks, do not involve any weights. Our preliminary experiments suggest that it is possible to prune activations with a 2:4 pattern without accuracy loss; a fully general methodology is future work.

References